Int. J. Electron. Commun. (AEÜ) 128 (2021) 153474
Available online 17 October 2020
1434-8411/© 2020 Elsevier GmbH. All rights reserved.
Regular paper
Improvement on the image rejection ratio via phase error equalization and
adaptive DC tuning in Hartley receivers: A practical approach
Serkan Topaloglu
a,*, Hilmi Kayhan Yilmaz
b, Binboga Siddik Yarman
c aYeditepe University, Faculty of Engineering, Dept. of Electrical and Electronics Eng., Istanbul, TurkeybRoketsan Missiles Corp., Avionics Technologies Dept., Elmadag, Ankara, Turkey
cRFT Science & Technology Co., Lincoln University, U.K. and Istanbul-Cerrahpasa University & Istanbul Technical University, Turkey
A R T I C L E I N F O Keywords:
Frequency down-conversion Hartley image rejection Heterodyne receivers Double-balanced mixers Phase imbalances in mixers Amplitude errors of mixers
A B S T R A C T
This paper presents a novel tunable method to improve the image rejection ratio in image-reject down-con-verters. The proposed technique is based on the phase equalization and amplitude error mitigation through proper biasing of mixers. With the aid of the proposed technique, amplitude, and phase imbalances, resulting in unwanted images, were minimized. Therefore, significant improvement in the image rejection ratio was attained without using complex filter banks. Phase equalization is accomplished by introducing a delay line to force the phase error to be zero at the center of the frequency band.
A frequency down-converter was designed and built with discrete components for an L-band Hartley receiver, which operates over 950–1450 MHz. Image rejection performance of the proposed technique was shown by simulation and prototype-measurements. It is exhibited that the proposed easy to apply technique provides a considerable improvement in the entire band without disturbing the system. Consequently, an average of 50 dB and a maximum 77 dB image rejection ratio can be obtained in Hartley image rejection and dual-IF receivers without using traditional filters.
1. Introduction
Recently, wireless communication is on the rise and many devices share the same frequency spectrum. Therefore, spectrum efficiency is one of the crucial issues in wireless communication. In the classical literature, it is a common practice to suppress undesired image signals by means of frequency-selective adaptive filters [1,2]. In this regard, heterodyne receivers may be employed as frequency down-converting topologies with an image rejection filter, which is placed before the mixer to suppress the undesired images. This approach is appropriate for narrow-band operations. If the undesired image is in the frequency band of operation, then one cannot employ a frequency selective filter to remove it. In that case, in-band image mitigation is warranted by a dual- IF down-converting topology. However, one can still utilize selective bandpass filters with high attenuation in the stopbands to clear the undesired image harmonics. On the other hand, the use of filters and dual IF based image rejection techniques unnecessarily complicate the receiver topology and increases its physical size.
Referring to Fig. 1, in an image-reject receiver topology, the image- rejection ratio (IRR) depends on the phase and the amplitude imbalances
between in-phase (I) and quadrature (Q) signal sections [3,4]. When the phase error is removed over the entire frequency band, IRR makes an abrupt peak at a single frequency, say fp and falls rapidly as the
fre-quency increases (see Fig. 9). Therefore, the amplitude error is more significant in reducing the image rejection ratio. Hence, in this paper, a practical method is introduced to improve the image rejection ratio by minimizing the amplitude error born due to imperfections of the com-ponents employed in the receiver architecture, while forcing the phase error to be zero at the center of the frequency band.
Referring to Fig. 1, the crux of the new image rejection method is two folded. First, a delay length (a transmission line of length ˝l˝) is intro-duced in the Q section to force the phase error to be zero at the center of the frequency band. Then, the amplitude error is minimized by tuning the biasing of the mixer diodes in an adaptive manner, which in turn substantially improves IRR.
In Section 2, design considerations of the IF down-converter archi-tecture are discussed. Section 3 is devoted to the actual implementation of the Hartley Image Rejection Receiver topology with discrete com-ponents. In Sections 4 and 5, the theoretical background for the IRR improvement via phase error equalization and minimization of the
* Corresponding author.
E-mail address: serkan.topaloglu@yeditepe.edu.tr (S. Topaloglu).
Contents lists available at ScienceDirect
International Journal of Electronics and Communications
journal homepage: www.elsevier.com/locate/aeue
https://doi.org/10.1016/j.aeue.2020.153474 Received 13 July 2020; Accepted 18 September 2020
amplitude error are presented, respectively. In Section 6, the details on HIRR prototype and the measurement results, a discussion and com-parison with the literature are given. Finally, the conclusion is placed under Section 7.
It is shown that the proposed, easy-to-apply, and non-disturbing “IRR maximization method” offers a significant improvement in IRR over the existing ones. It also simplifies the receiver architecture by eliminating unnecessary use of filters. Our measurements verify that one can reach up to a maximum of 77 dB IRR with an average value of 50 dB over the entire frequency band.
2. Design considerations
This paper introduces an adaptive method to mitigate image signals that appears in the Hartley Image Rejection Receiver (HIRR) topology. The block diagram of the downconverter is shown in Fig. 1. In this figure, the RF input signal x(t) includes both fundamental and image signal, and it is expressed as
x(t) = cos(ω1t) + cos(ω2t) (1)
where ω1=2πf1 and ω2=2πf2 are the angular fundamental and image
frequencies, respectively. When the input signal x(t) is applied to the mixer-M2 in the upper path together with the local oscillator signal,
cos(ωLOt); resulting in-phase output signal yi(t) is given by
yi(t) = [cos(ω1t) + cos(ω2t) ]cos(ωLOt)
=1 2[cos(ω1− ωLO) +cos(ω2− ωLO)t ] + 1 2[cos(ω1+ωLO)t + cos(ω2 +ωLO)t ] (2) The high-frequency components (ω1+ωLO)and (ω2+ωLO)of (2) can be filtered yielding the simplified in-phase signal y’
i(t) such that y’
i(t) =
1
2[cos(ω1− ωLO)t + cos(ω2− ωLO)t ] (3)
In a similar manner, when the input signal x(t) is passed through the quadrature mixer-M1 (lower section together with the local oscillator signal, sin(ωLOt)); resulting quadrature output signal, yq(t), is given by
yq(t) = [cos(ω1t) + cos(ω2t) ]sin(ωLOt)
=1 2[sin(ω1− ωLO)t − sin(ω2− ωLO)t ] + 1 2[sin(ω1+ωLO)t − sin(ω2 +ωLO)t ] (4) Likewise, the high-frequency components of yq(t) is filtered out
yielding the simplified quadrature output signal y’ q(t) as y’
q(t) =
1
2[sin(ω1− ωLO)t − sin(ω2− ωLO)t ] (5)
When the quadrature signal y’
q(t) is passed through an ideal 900
phase shifter over the entire frequency band as shown in Fig. 1, then, the resulting output signal, y˝
q(t), is obtained as y’’ q(t) = 1 2 { sin[(ω1− ωLO)t+900 ] − sin[(ω2− ωLO)t + 900 ] } (6) or equivalently, y˝ q(t) = 1 2[cos(ω1− ωLO)t − cos(ω2− ωLO)t ] (7)
Hence, addition of the filtered in-phase signal y’
i(t) of (3) and filtered
quadrature signal y˝
q(t) of (7) yields the image free IF signal XIFS(t) such
that
XIFS(t) = y’i(t) + y ˝
q(t) = cos[(ω1− ωLO)t ] (8)
In (8), it is presumed that all the components of Fig. 1 are ideal. Unfortunately, this is not the case in practice. Therefore, due to manufacturing tolerances (e.g., un-equal splitter path losses at the input, imbalanced mixer phase which may be designated by the phase error ∅(ω), etc.), one can add an error term ε(t) to (8) to describe overall imperfections of HIRR such that
˜
XIFS(t) = XIFS(t) +ε(t) (9a)
where the error term, ε(t), may be described by means of its Fourier transform such that
∊(jω) =F{ε(t)} = A(ω)ej∅(ω)=Acos(∅) + jAsin(∅) (9b)
In (9b), A(ω)and ∅(ω)are called the amplitude and phase imbal-ances or equivalently amplitude and phase errors of the down-converted signal, ˜XIFS, respectively. Based on the above definitions, in an image
∑
x(t)
Cos(ω
LOt)
sin(ω
LOt)
90
°
y
q(t)
y
i(t)
x
IFS(t)
f
IFf
IFf
IFf
IFf
IFf
IFLPF
y
i´(t)
LPF
y
q´(t)
M2
M1
y
q´´(t)
reject down-converter, the Image Rejection Ratio (IRR) is expressed as [5–7] IRR = − 10log ( PIM PF− IF ) =PF− IF(dBm)− PIM(dBm) = − 10log ⃒ ⃒ ⃒ ⃒1 − ∊(jω ) 1 + ∊(jω) ⃒ ⃒ ⃒ ⃒ 2 = − 10log [ 1 + A2− 2Acos(∅) 1 + A2+2Acos(∅) ] (10) where PF− IF and PIM are the actual powers of the fundamental IF and
the suppressed image signals measured at the output of the summing block (Σ) of Fig. 1, respectively. Similarly, PIM(dBm)andPF− IF(dBm) are
the power values of the corresponding image and fundamental IF sig-nals. The amplitude imbalance A may be expressed in dB as
AdB= − 20log(A) (11)
As dictated by (10), in Fig. 2, IRR is depicted as a function of amplitude imbalance in dB for selected phase errors ∅ [5–7]. In the following section, some practical issues are discussed due to discrete component imperfections of Fig. 1.
3. Implementation of HIRR with discrete components
The HIRR topology can be implemented using discrete components, as shown in Fig. 3. The first component of HIRR is a signal splitter with
identical path lengths. The upper path of the splitter drives the in-phase section (I), whereas the lower path feeds the quadrature section (Q) of HIRR. In the upper path, the passive mixer M2 is fed with a local oscillator (LO) of XLO2(t) = cos(ωLOt), while the lower path passive
mixer M1 is driven with an identical LO with a 900 phase shifter yielding
XLO1(t) = cos(ωLOt + 900) =sin(ωLOt). If M1 and M2 are not identical
0 2 4 6 8 10 Amplitude Imbalance(dB) 0 10 20 30 40 50 Image rejection (dB ) 0.1 Degree 1 Degree 2 Degree 5 Degree 10 Degree 20 Degree 40 Degree
Fig. 2. IRR at the different amplitude and phase mismatches.
Band-pass filter
Splitter Hybrid 90°
Coupler
Gain Block Gain Block
90° Hybrid Coupler Mixer M1 Mixer M2 Gain Block Local Oscillator Input Band-pass filter IF Output RF Input In-Phase Section Quadrature Section Hartley Image Downconverter Section of Receiver
Fig. 3. The block diagram for discrete Hartley Image Rejection Receiver.
0.95 1.05 1.15 1.25 1.35 1.45 Frequency (GHz) PD0922J5050S2HF_Splitter_Amplitude_Mismatch -0.03 -0.02 -0.01 0 0.01 0.02 0.03 Amplitude Error Betwe en Ports (dB )
Fig. 4. Splitter Amplitude Mismatch.
0.95 1.05 1.15 1.25 1.35 1.45 Frequency PD0922J5050S2HF_Splitter_Phase_Mismatch -0.3 -0.25 -0.2 -0.15 -0.1 -0.05 0 Ph ase Error Between P orts (Degree )
due to manufacturing intolerances, then there will be an amplitude A(ω) and phase ∅(ω)mismatch of M1 with respect to the XLO2(t). Similarly, the output of M1 may be expressed as
XLO2(t) = cos(ωLOt) +ε(t) (12)
In (12), the Fourier transform of the error ε(t) is given as in by (9b) such that ∊(jω) =A(ω)ej∅(ω). Then, IRR follows as in (10).
In Fig. 3, the splitter is manufactured by Anaren [8]. Its scattering (s) parameter simulation was performed using AWR and resulting ampli-tude and phase mismatch simulations are depicted in Fig. 4 and Fig. 5, respectively. Close examination of these figures reveals that the maximum amplitude mismatch occurred at 1.383 GHz, with y =
0.024dB. On the other hand, the maximum phase error is ∅ = 0.2140 at
1.103 GHz. Based on these values, it can be stated that the splitter presents acceptable performance degradation since the imbalanced amplitude and phase error values are tolerable, but other components of
Fig. 3 introduce more amplitude and phase mismatches. For example, “QCS-152+” from Mini-Circuits was employed as a 900 splitter or
Hybrid-Coupler 1(HC1). The s-parameter simulations of the 900 splitter
(HC1) was analyzed between 880 MHZ and 1380 MHz [9]. “JSPQW- 100A+” from Mini-Circuits was utilized as a 900 combiner or Hybrid
Coupler 2(HC2). Simulations of the 900 combiner (HC2) is completed at
the IF frequency of 70 MHz [10]. The power splitter presents a − 0.1460
phase error at 1000 MHz and the 900- splitter (HC1) shows a +3.8170
phase error at 930 MHz; the 900 combiner posses a − 0.6500 phase error
at 70 MHz [8–10]. So, overall phase error becomes ∅ = +3.0210 with
respect to the image signal, which is located at 860 MHz. Complete phase and amplitude error simulations of HIRR of Fig. 3 were performed
in AWR and the results are depicted in Fig. 6 and Fig. 7, respectively. Close examination of Fig. 6 reveals that the complete phase error of the HIRR of Fig. 3 decreases as the frequency increases. It starts from 3.210 at 810 MHz and it comes down to 1.580 at 1310 MHz. Fig. 7
in-dicates that the overall amplitude error of HIRR is confined between 0.598 dB and − 0.464 dB from 810 MHz to 1310 MHz. At a selected image frequency ˝f˝, the phase and the amplitude errors are determined from Figs. 6 and 7 respectively; then, using (10), one can generate IRR variation as a function of the image frequency as depicted in Fig. 8. Obviously, in this figure, there is no correction applied on IRR. In this
0.81 0.91 1.01 1.11 1.21 1.31
Image Frequencies (GHz) Phase Error With Respect To Image Frequency
1.5 2 2.5 3 3.5 Ph ase E rr or Bet w ee n I a nd Q (De gree )
Fig. 6. The complete phase error of HIRR of Fig. 3.
0.81 0.91 1.01 1.11 1.21 1.31
Image Frequencies (GHz)
Amplitude Error With Respect To Image Frequency
-0.5 0 0.5 1 Am plitud e Err or Be tw ee n I a nd Q (d B )
Fig. 7. The complete amplitude error of HIRR of Fig. 3.
0.81 0.91 1.01 1.11 1.21 1.31
Image Frequencies (GHz) Expected Image Rejection
26 28 30 32 34 Image rejection (dB )
Fig. 8. Expected image rejection ration based on s-parameter simulations.
0.81 0.91 1.01 1.11 1.21 1.31
Image Frequencies (GHz)
Image Rejection With Respect To Image Frequency
20 40 60 80 100 Image Rejection (dB )
Fig. 9. IRR as a function of image frequency when the overall phase error is eliminated.
0.81 0.91 1.01 1.11 1.21 1.31
Image Frequencies (GHz)
Image Rejection With Respect To Image Frequency
30 32 34 36 38 Image Rejection (dB )
Fig. 10. IRR as a function of image frequency when overall amplitude error is eliminated.
case, the best image rejection value is obtained at 965 MHz with IRR = 32.78 dB. On the other hand, the worst image rejection is 27 dB at 810 MHz. These IRR values are not acceptable for standard communication systems. Therefore, image rejection of HIRR of Fig. 3 must be improved as discussed in the following section.
4. Phase error equalization employing a fixed delay length
Referring to the HIRR schematic of Fig. 3, an improvement in the image rejection ratio could be achieved by eliminating the phase mis-matches. In this section, we propose a method to minimize the phase error. Firstly, let us identify the effect of zero phase error on the overall image rejection ratio (i.e. ∅(ω) =0case; ∀ω). The result of this
simula-tion is depicted in Fig. 9. Similarly, Fig. 10 exhibits the overall IRR variation as a function of image frequency under zero amplitude mis-match(i.e.A(ω) =0case; ∀ω).
Referring to Fig. 9, IRR reaches its maximum values of 90 dB at f = 940 MHz and it drops sharply down to 37 dB over a narrow frequency band (850 MHz ≤ f ≤ 1010 MHz). On the other hand, considering
Fig. 10, any method, which eliminates the amplitude error, brings IRR more than 32 dB over the entire frequency band. Therefore, this work is mainly focused on the elimination of amplitude mismatches. On the other hand, no matter how proper the physical implementation of HIRR is, one would face a non-zero phase error, which linearly decreases over the frequency band of interest, as depicted in Fig. 6.
The crux of the phase error equalization method is that a constant phase shift is introduced as a delay line of 50 Ohms, either in I or in Q path to make the phase error ∅(ω)zero at the center frequency fc of the
band. For the case under consideration, fc is 1060 MHz. By extending
the Q path of Fig. 3 properly, ∅(fc)is made zero. Hence, the phase error is anti-symmetrically distributed above and below of fc as depicted in
Fig. 11. This process is called the “phase error equalization”. It should be noted that, at this point, IRR is naturally maximized with respect to phase error since ∅(fc)is set to zero at fc and it is distributed in the
passband about fc. For the case under consideration, the best IRR is
obtained as 47 dB at 950 MHz as shown in Fig. 12.
In the following section, we introduce an adaptive DC tuning tech-nique to minimize the amplitude error A(ω)in the passband.
5. Minimization of the amplitude error via adaptive DC tuning and a novel IRR maximization method
In this section, a novel adaptive IRR maximization method is intro-duced. The method consists of two steps. As explained in the previous section; in the first step, the phase error ∅(ω)is forced to be zero at the center of the passband by adequately adjusting the Q-section’s path length of Fig. 3, which in turn maximizes IRR with respect to phase error.
In the second step, overall amplitude error A(ω)of the IF down- converter topology is minimized by varying the bias of passive mixers M1 and M2 suitably, as detailed below.
In practice, Schottky barrier diodes are safely used up to Ku-Band in passive mixer designs. For example, passive mixer operations could be performed using either a single diode or a diode bridge (or equivalently a diode ring). Therefore, the insertion loss of the passive mixers directly depends on the I − V characteristics of the diodes employed in the mixers.
Mixing operation stems from the nonlinear relation between the diode current I and the voltage V. Adaptive amplitude compensation is based on varying the insertion loss of the in-phase or quadrature section by increasing the insertion loss of the mixers considering the image frequency. The local oscillator power that is required to drive the diodes into their nonlinear region is directly related to the saturation current Is
of the diodes. Therefore, the amount of the local oscillator power level is determined by the nonlinear diode I − V characteristic as detailed in
[11,12]. Thus, I = Is [ eq(V− IRs )nKT ] (13) where q is the charge of an electron; n is the ideality factor specified by the manufacturer; k is the Boltzmann constant; T is the temperature in Kelvin and Rs is either forward or reverse biased series diode resistance.
Even though the mixers are driven by the optimum local oscillator power level, diode parameters are also effective on the insertion loss of the mixer. Intrinsic loss occurs due to the conversion process. For example, the parasitic loss is related to parasitic elements of the diode. In this regard, the diode conversion loss LC is expressed in terms of the
intrinsic loss LO and the parasitic loss LP as in [13].
LC=LOLP (14)
0.81 0.91 1.01 1.11 1.21 1.31
Image Frequencies (GHz) Phase Error With Respect To Image Frequency
-1 -0.5 0 0.5 1 Ph ase E rr or Bet w ee n I a nd Q (De gree )
Fig. 11. Phase mismatch under phase equalization.
0.81 0.91 1.01 1.11 1.21 1.31
Image Frequencies (GHz) Expected Image Rejection
25 30 35 40 45 50 Image rejection (dB )
Fig. 12. Image rejection ratio in the case of only phase error elimination approach is applied.
R
sC
jR
j+
-V
The equivalent circuit model of a diode is introduced in Fig. 13. The parasitic loss of the diode is directly related to two parasitic elements, which are placed in the equivalent model. These parasitic elements are the junction resistance, Rj, and the junction capacitance, Cj.
The parasitic loss is expressed as
LP= Pav Pd =1 +Rs Rj +ω2C2 jRsRj (15)
where Pav is the available power and Pd is delivered power to the
junction resistance Rj.
The junction capacitance Cj of the diode is described as in [11–16] Cj= Cj0 ( 1 − V VB )1/2 (16)
where Cj0 is the junction capacitance at rest (at zero volts); VB is the
barrier voltage of the diode and V is the applied diode voltage, which may be either forward or reverse direction. Referring to (15) and (16), parasitic losses were investigated in [11]. Influence of diode biasing on the mixer’s conversion loss, LC, was analyzed by measurements, as
shown in Fig. 14 [11].
LC reaches its minimum value, LC− min, when the mixer is driven by an
optimum LO power, POLO. For the design under consideration, POLO is
about 5 dBm which yields the minimum conversion loss,
LC− min ≅3.4 dB. LC deviates above and below about LC− min and it is
kept at a minimal fixed level by applying a proper DC biasing on the mixer diodes [11–13].
The applied diode bias V changes the junction capacitanceCj; which
in turn effects LP and LC as dictated by (15) and (14), respectively.
A double-balanced mixer, which includes a “diode-ring”, is employed in the image-reject converter under consideration. The di-odes’ operation point varies with the applied bias voltage V. Notably, in the diode-ring, two of the diodes are opened at higher voltages while the others are closed. This way of diode-ring operation effects the mixer IF output power PIF; which in turn changes the mixer insertion loss IL =
10log (
PRF
PIF
)
. In this representation, PRF designates the RF available
power at the input of the mixer.
It should be noted that, once the local oscillator power is set to its optimum power level (POLO), then the insertion loss (IL) of a mixer
constructed on a diode-ring topology increases with the applied DC bias voltage. Therefore, if one wishes to increase the IL, then the diodes are
appropriately biased. Otherwise, no biasing is invoked. Having this statement in mind, referring to Fig. 3, in our proposed operation, a proper DC bias voltage was applied to the diodes of mixers considering the total amplitude error between the “in-phase” and “quadrature” sections. If the total insertion loss of the “in-phase section” is higher than that of the “quadrature section”, the bias voltage is only applied to the lower mixer M1 to increase the attenuation on the quadrature path; otherwise, M2 is biased accordingly. Thus, the amplitude mismatch between “in-phase” and “quadrature” sections is appropriately equalized.
Referring to Fig. 7, one can adjust the DC biasing of the mixers to minimize the amplitude mismatch as a function of image frequency, between M1 and M2, which in turn further improves IRR of (10). For example, in Fig. 7, the amplitude error, A(ω), is positive up to 939 MHz. It means that the attenuation in the upper path (the “in-phase section”) is higher than that of the attenuation of the lower path (“quadrature section”) over the frequency band of 810 MHz ≤ f ≤ 939 MHz. In this case, if the image frequency is in this band, then a proper DC biasing is required for the lower mixer M1 to equalize the amplitude mismatch between the upper and the lower paths. On the other hand, from 940 MHz to 1330 MHz, the amplitude error is negative. In other words, attenuation is higher in the lower path as compared to the upper path. Therefore, it is necessary to apply a proper DC biasing to the upper mixer M2 to introduce additional loss to equalize the amplitude mismatch between the upper and lower sections.
6. HIRR prototype and measurement results
This section covers the details of the HIRR prototype, which consists of discrete components and its measured electrical performance. Details of the 00 splitter, 900 splitter and 900 combiner are already given in
Section III. The mixers (M1 and M2) employed in HIRR are SYM- 30DLHW+ from Mini Circuits. The optimum LO power for the mixers is given in the manufacturer’s datasheet as +10 dBm. In the laboratory environment, + 10 dBmis fed to the LO ports using an external RF- Signal Source. Then, adjustable DC bias is applied to IF port using a standard bias tee with the aid of pre-measured voltage values, as given in
Table 1. The basic measurement setup is given in Fig. 15.
The circuit components are all 50-Ohm matched at their inputs and outputs. All port connections are made over SMA connectors of 50 Ω.
All the components were laid out on a four-layer FR4 substrate with the dielectric constant εr =4.2, thickness h = 1.6 mm with 1 oz copper on the top and the bottom. The top layer is used for RF components and RF signal transmission. The second, third and bottom layers are employed for grounding, digital signals and power biasing, respectively. On the substrate, interconnections between the components were real-ized as transmission lines of 50 Ω characteristic impedance.
Calculated CPW parameters were fed to AWR to determine ampli-tude and phase mismatches between I and Q sections by simulation. Then, the required line extension is calculated to force the phase error to be zero at the center of the frequency band, which is fc=1060 MHz. It is found that the phase compensation is provided by extending CPW length in Q-Section, as discussed in Section V.
To equalize the amplitude mismatch in I and Q sections, DC bias voltage of the mixers is adjusted over a “Digital to Analog Converter” (DAC) with 12-bit digital inputs. The DAC is manufactured by Texas Instrument Co. with part number DAC121S101. It generates analog DC output voltage varying from 0 to 5 V with 1.2 mV steps. The digital inputs were controlled over the SPI bus. Let us summarize the
Fig. 14. Conversion loss of a diode when DC bias applied [11].
Table 1
The samples of pre-determined DC bias values corresponding to the optimal IRR for various frequencies.
Fundamental Frequency (MHz) 1090 1150 1200 1250 1300 1350 1400 1450
Image Frequency (MHz) 950 1010 1060 1110 1160 1210 1260 1310
measurement results of the prototype receiver as follows.
The targeted intermediate frequency is set to IF = 70 MHz. The measured positive phase error of I-section is ∅(IF) = 2.3710. Therefore,
it is compensated at IF = 70 MHz in Q-Section by extending the lower path about L = 16.11 mm. In Fig. 16, the reference “I-section” and “extended Q-Section” lines are highlighted in white color.
The post-production picture of the proposed design is shown in
Fig. 17. RF signal is applied to the input port of the proposed design. Furthermore, the LO signal was changed with respect to RF signal fre-quency to obtain a down-converted signal at 70 MHz. As already
discussed, the front-end of the proposed design includes a band-pass filter to eliminate the out-band signal effects. The passband of the fil-ter is 950 MHz ≤ f ≤ 1450 MHz. Image signals exist over 810 MHz − 1310 MHz. Therefore, image rejection measurements were conducted only from 950 MHz to 1310 MHz to eliminate the effect of the band-pass filter on image rejection. In other words, the fundamental signal is applied from 1090 MHzto1450 MHz. Both down-converted fundamental and image signals were measured without any compensa-tion (i.e., with no DC bias voltage applied to the mixers). Based on our simulation results, it is found that
DUT
RF PORT LO PORT IFPORT Spectrum Analyzer
Signal Generator Signal Generator
BIAS TEE
DC Power Supply Fig. 15. The basic set-up used for the measurements.
Fig. 16. In-phase and quadrature parts’ TLs.
(a) the insertion loss of the I-section was higher than that of the Q- section over810 − 940 MHz;
(b) the insertion loss of the Q-Section was higher than that of the I- Section over 940 − 1310 MHz.
Therefore, the amplitude mismatch elimination technique is applied from 950 MHz to 1310 MHz by varying the DC bias voltage of the I- section mixer to increase the insertion loss in the upper path. In Fig. 18, the down-converted fundamental signal power is depicted as a function of the fundamental input frequency with DC Bias Voltage Adjustment (DC-BVA), which is plotted in pink-line and without DC-BVA (blue line). Similarly, in Fig. 19, down-converted image signal power variation is shown as a function of input image signal frequency with DC-BVA (pink line) and without DC-BVA (blue line). Close examination of Fig. 18 re-veals that the fundamental down-converted signal power (PF− IF) is not
much affected by the applied DC bias voltage since the biased PBF− IF and
un-biased PUF− IF signal power curves closely follow each other within
0.1 dB difference, which is insignificant for an actual receiver. In other words, the proposed image rejection method does not practically degrade the fundamental IF. On the other hand, as shown in Fig. 19, the input image frequency of 1060 MHz is significantly suppressed as compared to that of “un-biased down-converted image signal power. Hence, the improvement in image suppression is about 36 dB. As far as IRR of (10) is concerned, the maximum achieved IRR is 77 dB at 1060 MHz.
1.09 1.19 1.29 1.39 1.45
Input Fundamental Signal Frequency (GHz) -12.8 -12.75 -12.7 -12.65 -12.6 -12.55 -12.5
Downcon. Fund. Sig. P
ow. (dBm
)
IF signal @ 70 MHz , After DC Bias Applied IF signal @ 70 MHz , Before DC Bias Applied
Fig. 18. Measured values to analyze the influence of the proposed method on the fundamental signal.
0.95 1.05 1.15 1.25 1.31
Input Image Signal Frequency (GHz) 15 25 35 45 55 65 75 80 IRR (dB ) 1.31 GHz 46.34 1.31 GHz 40.49 1.16 GHz 29.58 1.16 GHz 41.66 1.06 GHz 40.36 1.06 GHz 77.03 0.95 GHz 18.97 0.95 GHz 26.57
IRR Before DC Bias Applied IRR After DC Bias Applied
Fig. 19. Measured values to analyze the influence of the proposed method Image rejection ratio (IRR) improvement.
Table 2 Comparison of this work and the related literature. Implementation type Supply (V) Applied technique Adaptivity of technique On-line calibration Operation bandwidth (MHz) Frequency (GHz) Best IRR (dB) Improvement in IRR (dB) [21] IC – Buffer Circuit Adaptive N/A 450 2.4 35 10 [22] IC – Varactor Tuning Adaptive No 12,000 60 49 15 [23] Analytical model/ Simulation – Pre-Distortion Adaptive No Single 1– 10 33 20 [24] IC – Envelope Detection Adaptive Yes Single 0.501 55 35 Sign Derivation Direction [25] IC 2.5 Poly-phase Filter Fix N/A 5 2.401 –2.205 60 N/A [26] IC 2.6 Poly-phase Filter Fix N/A 10 0.22 58 N/A [27] Analytical model/ Simulation Pre-Distortion Adaptive N/A Single 0.5 226 200 [28] Discrete – Statistical Adaptive Yes Single 20 45 28 [29] Antenna N/A Complementary split ring resonators antenna Fix N/A Single 2.4 32 N/A This Work Discrete 3.3 DC biasing of the passive mixers Adaptive No 500 0.950 –1.450 77 36
7. Discussions
In the literature, there are various techniques to improve the IRR
[17–29] in IF receivers. For example, effects of DC biasing of mixers on IRR are investigated in [17–20]. In these papers, Superconductor- Isolator-Superconductor (SIS) junction mixers are utilized, which are suitable for extraterrestrial applications. There, it is mentioned that one can reduce the IF image power with respect to IF signal power by optimizing the DC biasing of SIS junctions. However, these papers do not concern with the effect of phase error on IRR. IC-based IRR maximiza-tion methods reported in [21–26] results in IRR values ranging from 30 to 61 dB.
A simulation-based IRR maximization technique yields better than 26 dB improvement at 500 MHz via compensation of DC offset in the quadrature modulator section of the IF receiver [27]. This result is the outcome of a solely system-level simulation. In [28], a blind self- calibration technique is applied to a discrete IF receiver with 45 dB improvement in IRR. In [29], complementary split ring resonators are used on the antenna side to notch out the two possible image frequencies yielding to a best IRR of 32 dB at 2.4 GHz. A comparison table is given in
Table 2.
Moreover, apart from Hartley receivers, the work of Li [30] deals with phase noise issues while reducing the reference spur down to − 68dBc level in a PLL.
In short, as stated above, in our newly-proposed and easy to apply (i. e. practical; not disturbing the receiver) IRR improvement method, simultaneous minimization of phase and amplitude errors results in 77 dB IRR at fc=1060 MHz, with an improvement of 36 dB.
The measured average IRR value is 50 dB (i.e., minimum IRR is 25 dB, and maximum IRR is 77 dB over the entire frequency band), which is quite good when compared with the studies presented in the literature.
8. Conclusion
In this paper, an adaptive image rejection ratio (IRR) maximization method is introduced to improve the frequency spectrum efficiency of Hartley receivers.
The proposed method consists of two steps. In the first step, the phase error is equalized by introducing a fixed delay line in the receiver ar-chitecture either in the “In phase-I” or in the “Quadrature-Q” path, which in turn maximizes IRR with respect to phase error. In the second step, the overall amplitude error of the IF down-converter topology is minimized by adjusting the bias of the passive mixers suitably.
It is shown that the amplitude error is dominant in the image rejection ratio over the phase error. The proper DC bias voltage values were specified by observing the image signal powers or equivalently insertion loss of the paths in the frequency spectrum.
A lookup table is generated for the pre-determined DC bias values against the corresponding insertion loss values. Then, the proper bias values are produced at the output of a Digital-to-Analog Converter (DAC) driven by a microcontroller.
It is shown that the proposed, adaptive, easy-to-apply and non- disturbing method provides an improvement of 36 dB in IRR over the classical methods in the L-band. A maximum of 77 dB IRR was achieved at 1060 MHz, which may be considered as an outstanding performance measure for an IF receiver.
Declaration of Competing Interest
The authors declare that they have no known competing financial
interests or personal relationships that could have appeared to influence the work reported in this paper.
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