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Trade-offs exist among them and it is difficult to design codes that meet all of the criteria

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Academic year: 2021

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CONCLUSION

Spread-spectrum signals for digital communications were originally developed and used for military communications either to provide resistance to jamming or to hide the signal by transmitting it at lower power and making it difficult for an unintended listener to detect. To overcome the problems of intentional or unintentional interference, bandwidth of the transmitted signal is widened by means of a code that is independent of the signal itself.

Spread-spectrum is usually combined with error coding to further suppress the effects of narrowband and broadband interference on the transmitted signal. Depending on the application, codes can be designed to meet certain criteria, including low error floors, efficient encoding and decoding, or near capacity performance. Trade-offs exist among them and it is difficult to design codes that meet all of the criteria. Convolutional codes have the advantage that their complexity and latency are less compared to some of the best error correcting codes. The drawback is that they do not perform just as well.

Pulsed jamming is a type of broadband interference where the interferer transmits at a high level only a percent of the time and hence may affect many consecutive transmitted bits. In fact due to this reason a direct sequence spread spectrum (DS-SS) system performs poorly in the presence of pulse interference. In order to improve the performance of a coded DS-SS system an interleaver and a deinterleaver should be used at the transmitter and the receiver, respectively. The interleaver provides time diversity by separating the bits in time. Many interleaver types have been proposed in the literature but interleavers in general fall into two main categories: periodic and random interleavers.

This thesis first investigates the effects of block interleaver (a periodic interleaver) and pseudo-random interleaver (a random interleaver) on a convolutional coded DS-SS system. Probability of bit error performances of this system are analyzed for various values of signal to interference ratios (SIR) (0 to 6 dB) and a constant signal to noise ratio (SNR) (10 dB) and compared to another similar system with no interleaver and a third system with no interleaver and convolutional encoding. It is shown that at low SIR values (0 to 1 dB), no improvement in performance is obtained when interleaving and convolutional encoding are added to the system. It is also shown

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that at higher SIR values (greater than 2 dB), encoding and interleaving do improve the performance but the improvement is about the same for both interleavers.

In order to analyze the interleavers more clearly, this thesis then investigates the effect of interleaver type and interleaver size on the performance of the system.

Probability of bit error performances are obtained for these scenarios at low and high SIR values (1 and 6 dB) for short transmitted block lengths suitable for real-time applications (300 to 1400 bits long). It is demonstrated that although a slight improvement in performance is obtained for some block lengths when these two interleavers are used, this improvement is not significant enough.

Finally, this analysis is extended for SIR values in the range of 1 to 6 dB. It is proved that having either of the interleavers in the convolutional DS-SS system provide no additional improvement in performance. Therefore, complexity and delay could be reduced by omitting them in the design of this system.

Future work may include an investigation of interleavers from current communication standards. Standards include interleavers chosen after careful investigation that usually match certain criteria such as good performance and low complexity.

As another future work, the effect of concatenated codes, such as a combination of Reed-Solomon (RS) and convolutional codes can be analyzed. These concatenated codes can also be replaced with powerful error codes of today like turbo codes and low- density parity-check (LDPC) codes.

A study of interleavers and their relation to the error floor level can also be investigated. The DS-SS system has been show to exhibit error floors for some values of jamming duty cycle. It is also known for example that turbo encoding, which include an interleaver, show an error floor below certain probability of errors. Therefore, a study is needed to see if and how error floors are created for a coded and interleaved DS-SS system.

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