Development of front-end and data transmission integrated circuits for nuclear and hep experiments

The Fifth Conference “ Nuclear Science and Its Application”, 14-17 October 2008

DEVELOPMENT

OF

FRONT-END

AND

DATA TRANSMISSION

INTEGRATED CIRCUITS FOR NUCLEAR AND HEP EXPERIMENTS

Ö. COBANOĞLU. CERN (PH-ESE-ME)

Experimental physics relates to developing instrumentation and interpreting die data coming out o f it, usually in very large scale. From the physics phenomena down to interpretation o f the results, there is a strongly connected chain o f links including detector development, design o f front- end (FE) and data transmission Application Specific Integrated Circuits (ASICs), communication architectures, data acquisition

(D

M odem nuclear and high energy physics (HEP) experiments require the development o f custom-designed high-density ASICs. There are two main areas o f HEP in which ASICs are required: the front-end and the data transmission electronics. High integrated custom design, especially in front-end chips, is needed because o f required detection precision in terms o f time and spatial resolutions. The space allowed for the electronics due to required detector granularity is also a severe concern. Even though almost any kind o f building blocks with high performance are available commercially, they are not optimized and compiled onto chips dense enough in accordance to HEP requirements. Thus, building an experimental system composed o f commercial components only is usually very did]cult. Custom design, particularly that o f front-end ASICs, is needed because o f the in-existence o f commercially available chips which could be used for specific functionality required by experimental systems. Heavily radioactive environment leads to custom design also for data transmission ASICs, since either high-performance commercial products are not built for radiation hardness, or in case they are, their prices are prohibitively high. Using special layout techniques to make the circuits radiation tolerant is a decision made at the cost o f relatively bigger dies and, thus, slightly slower operation. In this tutorial, the development o f two ASICs covering the above applications is presented.

A multi-channel full-custom FE-ASIC is designed and implemented in a commercial 350nm CMOS technology for the binary readout o f a RICH detector system. The ASIC, which is successfully tested, amplifies the signals coming from fast multi-anode photo-multipliers and compares them against a threshold adjustable on-chip on a channel by channel basis. The chip is installed in the experimental system in 2008.

Acharge-pump phase-locked loop (CP-PLL) based serializer for a radiation-hard transceiver ASIC which has been under development for a next generation high energy physics experiment is being designed and implemented in a commercial 130nm CMOS technology. The transceiver ASIC is scheduled to be installed in the experimental systems within a decade.

The aim o f this tutorial is to introduce the nuclear physics community die field o f microelectronic design for experimental physics by two examples. It is considered particularly important for the future developments o f new national accelerator/detector facilities and for increasing the awareness o f the possible users o f such systems.

Section IV. Application O f Nuclear Technologies In Industry, M edicine And Agriculture