COMPARATIVE ANALYSIS BETWEEN CONVENTIONAL AND MODIFIED CASCADED H-BRIDGE NINE LEVEL TOPOLOGIES USING MULTICARRIER PULSE WIDTH MODULATION TECHNIQUES

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The Turkish Online Journal of Design, Art and Communication - TOJDAC ISSN: 2146-5193, September 2018 Special Edition, p.2032-2042

COMPARATIVE ANALYSIS BETWEEN CONVENTIONAL AND MODIFIED CASCADED H-BRIDGE NINE LEVEL TOPOLOGIES USING

MULTICARRIER PULSE WIDTH MODULATION TECHNIQUES

Jahangeer Soomro

Department of Electrical Engineering, Sukkur IBA University,Sindh, Pakistan 65200.

jahangir.soomro@iba-suk.edu.pk Faheem A. Chachar

faheem.akhtar@iba-suk.edu.pk Sohail Soomro

sohail.soomro@iba-suk.edu.pk ErumA Qasmi

erum.ee@iba-suk.edu.pk Jamshed Ansari 

jamshed.ahmed@iba-suk.edu.pk

ABSTRACT

Multilevel Inverters are used to operate sensitive devices and loads that require better power quality and lower total harmonic distortions. This research proposed a detailed comparative analysis between conventional nine level and modified nine level topology using level shifted sinusoidal pulse width modulation such as, In Phase Disposition (IPD), Phase Opposition Disposition (POD) and Alternate Phase Opposition Disposition (APOD) at different modulation index values in MATLAB/SIMULINK software.

Finally, modified topology is suggested to be the better choice as it uses only seven switches whereas conventional topology utilises sixteen switches. Thus, modified topology has very less switching losses, and its gate drive circuitry is less complicated as compared to traditional topology. Furthermore, the power quality is almost same in both topologies. Also, it is observed from the simulated results that nine level inverter offers better power quality and lower total harmonic distortions as compared to five level and seven level topologies. Hence, filter size and filtering losses will be lower in nine level topology.

Keywords: Sinusoidal Pulse Width Modulation; Total Harmonic Distortion; Power Quality; Cascaded H- Bridge Inverter, Multilevel Inverters.

1. INTRODUCTION

Inverters are used to convert dc power into ac power. That dc power can be taken from solar panels controlled rectifiers or batteries. Efficiency and power quality are main parameters while designing any power converters. Losses and total harmonic distortions are minimised as low as possible to develop efficient power converter [1]. Square and Modified sine wave inverters are used for small power application due to their high value of total harmonic distortions [2]. For high power applications and to run sensitive loads, multilevel inverters are used due to their better power quality [3]. Increasing the levels in the output of inverter improves power quality and hence reduces the size of filter [4]. Conventional cascaded h-bridge nine level inverter is simulated using MATLAB/SIMULINK software, and it has been observed that it has lower total harmonics distortions and better power quality as compared to five levels and seven levels inverters.

Level-shifted sinusoidal PWM techniques such as IPD, POD and APOD are used for controlling the output

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voltage of all inverter topologies used in this research paper. All the parameters are kept the same for the comparative analysis purpose.Conventional cascaded h-bridge topologies require n-1/2 h bridges for n level inverter [5]. Thus, the traditional nine level inverter four h-bridges (16 switches) are needed. Gate drive circuitry becomes complicated, and switching losses are increased due to the increased number of switches in conventional topology. Furthermore, microcontrollers and digital signal processors find it difficult to control such a vast number of switches due to low processing speed and serial processing [6]. Modified cascaded h-bridge topologies are preferred over conventional topologies due to reduced switching complexity without comprising the power quality of output [7]. Modified nine level inverter topology is suggested in this research paper where only seven switches are used, instead of sixteen switches. Thus switching losses are reduced, and gate drive circuitry becomes simpler in modified cascaded h- bridge inverter topology.

A. Sinusoidal Level Shifted PWM Schemes

The inverters whose output voltage is controlled using PWM techniques are called PWM inverters. Level- shifted PWM techniques are further classified into In Phase Disposition, Phase Opposition Disposition and Alternate Phase Opposition Disposition scheme [8]. It should be noted that for n level multilevel inverters n-1 triangular signals are required [9].

In Phase Disposition (IPD)

All triangular signals are in phase as shown in Fig. 1 [10].

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Fig. 1 In Phase Disposition PWM Phase Opposition Disposition (POD)

All the triangular signals above the reference point are 180° out of phase to those of below reference point as shown in Fig. 2 [10].

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Fig. 2 Phase Opposition Disposition PWM Alternate Phase Opposition Disposition (APOD)

Every adjacent carrier is 180° out of phase with each other as shown in Fig. 3 [10].

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Fig. 3 Alternate Phase Opposition Disposition PWM

2. SIMULATION RESULTS OF CONVENTIONAL NINE LEVEL TOPOLOGY USING IPD, APOD AND POD SCHEMES

Fig.4 shows model of single phase nine level general topology using sixteen switches.

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Fig. 4 MATLAB/SIMULINK Model of Conventional Nine Level Cascaded H-Bridge Inverter

Sinusoidal signal (control signal) has a frequency of 50 Hz, and a triangular signal (carrier signal) has a rate of 1 KHz. The resistive load having a resistance of 20Ω is used. Fig. 5 shows the IPD PWM scheme for nine level inverter general topology. Similarly, POD and APOD schemes can also be designed with a small variation in the values of triangular signals.

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Fig. 5 IPD PWM Technique for Conventional 9 level Topology Fig. 6 shows the output voltage waveform of the nine level inverter.

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Fig. 6 Output voltage waveform for Conventional 9 level Topology a. Nine Level IPD Scheme

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Fig.7 shows the amount of total harmonic distortions involved in output voltage using IPD PWM technique.

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Fig. 7 Output voltage THD at modulation index=1 and Switching Frequency=1 KHz b. Nine Level POD Scheme

Fig.8 shows the amount of total harmonic distortions involved in output voltage using POD PWM technique.

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Fig. 8 Output voltage THD at modulation index=1 and Switching Frequency=1 KHz c. Nine Level APOD Scheme

Fig.9 shows the amount of total harmonic distortions involved in output voltage using the APOD PWM technique.

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Fig. 9 Output voltage THD at modulation index=1 and Switching Frequency=1 KHz B. Comparative analysis among level shifted SPWM for nine level conventional topology

It is observed from the table 1 that power quality is improved by increasing the modulation index and total harmonic distortions are very comparable in all level shifted SPWM techniques.

Table 1: a Comparative analysis among level shifted SPWM for nine level topology

C. Comparative analysis among conventional cascaded 5 level, 7 level and 9 level conventional topologies It is observed from Table 2 that increasing the levels decreases the total harmonic distortions and hence improves the power quality. Thus filter size and filter losses for nine level topology will be smaller as compared to five level and seven-level inverter topologies.

Modulatio n Index

IPD THD (%)

POD THD (%)

APOD THD (%)

1 13.45 12.96 13.46

0.9 17.00 16.86 16.83

0.8 17.72 17.80 17.63

0.7 21.85 21.77 21.78

0.6 24.65 24.71 24.72

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Table 2: Comparative analysis among conventional cascaded 5 level, 7 level and 9 level topologies

3. SIMULATION RESULTS OF MODIFIED NINE LEVEL TOPOLOGY USING IPD, POD AND APOD SCHEMES

Modified nine level topology is suggested to better choice due to reduced switching complexity and simpler gate drive circuitry. It applies only seven switches as shown in Fig. 10. Whereas, sixteen switches are used in conventional topology.

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Fig. 10 MATLAB/SIMULINK Model of Modified Nine Level Cascaded H-Bridge Inverter

Fig. 11 shows the IPD PWM scheme for nine level inverter modified topology. Similarly, POD and APOD schemes can also be designed with a small variation in the values of triangular signals.

Modulation

Index Five Level

IPD THD% Seven Level IPD

THD%

Nine Level IPD THD%

1 27.47 18.26 13.45

0.9 34.01 22.77 17.00

0.8 39.00 24.34 17.72

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Fig. 11 Proposed IPD PWM Technique for Modified 9 level Topology a. Nine Level IPD Scheme

The power quality of modified topology is almost the same as conventional topology using IPD scheme as shown in Fig. 12.

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Fig. 12 Output voltage THD at modulation index=1 and Switching Frequency=1 KHz

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b. Nine Level POD Scheme

The power quality of modified topology is almost the same as conventional topology using POD scheme as shown in Fig. 13.

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Fig. 13 Output voltage THD at modulation index=1 and Switching Frequency=1 KHz c. Nine Level APOD Scheme

It is observed from Fig. 14 that power quality is very comparable with conventional topology using APOD scheme.

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Fig. 14 Output voltage THD at modulation index=1 and Switching Frequency=1 KHz 4. COMPARATIVE ANALYSIS BETWEEN NINE LEVEL CONVENTIONAL AND MODIFIED TOPOLOGY

It is finally concluded from Table 3 that modified nine level topology is a better choice as it not only uses less number of switches but also power quality (%THD) is almost same in both conventional and modified

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Table 3: Comparative analysis between nine level conventional and modified topology

5. CONCLUSION

It is observed that modified nine level topology is a better choice than conventional nine level topology due to a reduction in some switches. Switching losses would be least, and gate drive circuitry would be more straightforward with modified topology as compared to conventional topology. However, power quality is very comparable in traditional and modified nine level topologies. It is concluded from the simulated results that nine level topology offers better power quality and would need small size filter as compared to five level and seven-level inverter topologies.

REFERENCES

[1] Jayalath, Sampath, and Moin Hanif. "Generalized LCL-filter design algorithm for grid-connected voltage source inverter." IEEE Transactions on Industrial Electronics (2016).

[2] Beser, Ersoy, et al. "Design and application of a single phase multilevel inverter suitable for using as a voltage harmonic source." Journal of Power Electronics 10.2 (2010): 138-145.

[3] Babaei, Ebrahim, Sara Laali, and Zahra Bayat. "A single-phase cascaded multilevel inverter based on a new basic unit with the reduced number of power switches." IEEE Transactions on Industrial Electronics 62.2 (2015): 922-929.

[4] Nedumgatt, Jacob James, et al. "A multilevel inverter with reduced number of switches." Electrical, Electronics and Computer Science (SCEECS), 2012 IEEE Students' Conference on. IEEE, 2012

[5] Colak, Ilhami, Ersan Kabalci, and Ramazan Bayindir. "Review of multilevel voltage source inverter topologies and control schemes." Energy Conversion and Management 52.2 (2011): 1114-1128.

[6] Islam, Md Rabiul, Youguang Guo, and Jianguo Zhu. "FPGA-Based Digital Switching Controller for Multilevel Converters." Power Converters for Medium Voltage Networks. Springer Berlin Heidelberg, 2014. 153-188

[7] Najafi, Ehsan, and Abdul Halim Mohamed Yatim. "Design and implementation of a new multilevel inverter topology." IEEE Transactions on industrial electronics 59.11 (2012): 4148-4154.

[8] Jones, Martin, Fazlli Patkar, and Emil Levi. "Carrier-based pulse-width modulation techniques for asymmetrical six-phase open-end winding drives." IET Electric Power Applications 7.6 (2013): 441-452.

[9] Deepak, P. Chaithanya, and S. Nagaraja Rao. "Cascaded H-Bridge Multilevel Inverter Using Inverted Sine Wave PWM Technique." International Journal of Emerging Trends in Electrical and Electronics (IJETEE–ISSN: 2320-9569) 6.1 (2013): 39-44.

[10] Bayat, Hasan, et al. "Reduction of switching frequency using reference phase disposition PWM technique in multilevel H-bridge inverters." Power Electronics, Drive Systems and Technologies Conference (PEDSTC), 2011 2nd. IEEE, 2011

Topology Funda mental

Fswi tchin g

Ma Swit ches

%THD IPD POD AP

OD Conventi

onal

topology 50 100

0 1 16 13.

45 12.

96 13.

46

Modified

topology 50 100

0 1 7 13.

49 13.

01 13.

51