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The analysis of the electrical characteristics and
interface state densities of Re/n-type Si Schottky
barrier diodes at room temperature
Haziret Durmuş & Şükrü Karataş
To cite this article: Haziret Durmuş & Şükrü Karataş (2019) The analysis of the electrical characteristics and interface state densities of Re/n-type Si Schottky barrier diodes at room temperature, International Journal of Electronics, 106:4, 507-520, DOI: 10.1080/00207217.2018.1545145
To link to this article: https://doi.org/10.1080/00207217.2018.1545145
Published online: 17 Nov 2018.
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The analysis of the electrical characteristics and interface state
densities of Re/n-type Si Schottky barrier diodes at room
temperature
Haziret Durmuşaand Şükrü Karataş b
aDepartment of Physics, Faculty of Science, Selcuk University, Konya, Turkey;bDepartment of Physics, Faculty of
Science and Arts, Kahramanmaras Sutcu Imam University, Kahramanmaraş, Turkey
ABSTRACT
The main electrical characteristics of current-voltage (I-V) and capaci-tance-voltage (C-V) measurements at room temperature of the Re/ n-type Si Schottky barrier diodes prepared by pulsed laser deposition (PLD) method have been examined. The values of the basic electrical properties such as forward saturation current (Io), ideality factors (n),
barrier heights (Фbo), rectification ratio (RR) and series resistances (RS)
were obtained from I-V and C-V measurements using different calcula-tion methods. At low voltages (V≤ 0.3 V), the electrical conduction was formed to take place by thermionic emission, whereas at high voltages (V > 0.3 V), a space charge limited conduction mechanism was shown. Furthermore, the interface state densities (NSS) as a function of energy
distribution (ESS- EV) was obtained from the I-V data by taking into
account the bias dependence of the effective barrier height (Φb) for
the Re/n-type Si Schottky barrier diodes.
ARTICLE HISTORY
Received 5 March 2018 Accepted 30 September 2018
KEYWORDS
Electrical parameters; interface states; series resistance; rectification ratio; surface potential
1. Introduction
Metal-semiconductor (MS) Schottky structures are one of the simplest electronic instruments in semiconductor technology due to low cost, easy manufacturing and successful applications in electronic and photonic devices. Thus, semiconductor structures have attracted many interests because of their interesting physical properties for a wide range of applications in nanoelectronics/ optoelectronics. MS devices known as p- or n-type Schottky barrier diodes have a great quality due to their unique properties such as electronic circuit technology, large-scale integration and very large-scale integration. Thus, MS rectifying circuits are the main compounds of electronic technol-ogy, and the structures of MS are virtually the basis of all semiconductor devices (Demirezen, Altındal, & Uslu,2013; Rhoderick & Williams,1988; Sze,2006; Tung,1991; Werner & Guttler,1991). Depending on the state of the semiconductor may be Schottky contact or ohmic contact. In particular, the silisium-based Schottky barrier diodes have an important effect in semiconductor structures. The performance and stability of the MS Schottky structures are considerably influenced by the interface quality and barrier height between MS, interface states (NSS) between interfacial
layer, series resistance (RS) and also applied bias voltage (Alialy, Tecimer, Uslu, & Altındal, 2013;
Demirezen et al.,2013; Rhoderick & Williams,1988; Schmitsdorf, Kampen, & Monch,1995; Sze,2006; Tung,1991; Werner & Guttler,1991). Thus, electrical circuits required Schottky barrier diodes in the electronics industry are of great importance because of countless advantages. At the same time,
CONTACTŞükrü Karataş skaratas60@hotmail.com Department of Physics, Faculty of Science and Arts, Kahramanmaras Sutcu Imam University, 46100 Kahramanmaraş, Turkey
2019, VOL. 106, NO. 4, 507–520
https://doi.org/10.1080/00207217.2018.1545145
their low forward voltage drop and high switching speeds can be explained to be the most important properties (Altındal, Tataroğlu, & Dökme,2005; Taşdemir, Vural, & Dökme,2016).
As device performance improves, studies of both ohmic and Schottky contacts to Si are of great interest. Rhenium Schottky contacts have been studied for their stability on GaN, GaAs and Si for a long time (Durmuş, Kılıç, Gezgin, & Karataş,2018; Lin & Wu,1999; Venugopalan & Mohney, 1998). Rhenium is one of the rare elements found on Earth. At the same time, rhenium has the highest boiling point and melting point (Durmuş et al.,2018). This highest melting/boiling point and steady state makes rhenium (Re) an important candidate for a stable Schottky barrier diode in high temperatures (Shalish & Yoram,2000).
In our previous work (Durmuş et al.,2018), the I–V and C–V properties of Re/n-type Si Schottky barrier diodes were analysed only at low temperatures. In our work, we have calculated in more detail main electrical characteristics of Re/n-type Si Schottky barrier diode using the I-V and C-V data. Additionally, the interface state densities (NSS) as a function of energy distribution (EC
-ESS) were obtained from the forward-bias I-V dates by taking into account the bias dependence of
the effective barrier height (Φb) and series resistance (RS) for the Re/n-type Si Schottky structures.
The I-V characteristics of MS structures generally deviates from the thermionic emission theory (Durmuş et al.,2018). At the same time, the experimental results showed that at low voltages the electrical conduction was occur to take place by thermionic emission (TE) while a space charge limited conduction mechanisms (SCLC) was formed at high voltages. The presence of SCLC may be related to the quality of MS structures. The physical explanation for the very strong temperature dependence of ideality factor and barrier height can be made by using the SCLC density model dominated by the exponential distribution of traps. Thus, the SCLC conduc-tion should become important when the density of injected free-charge carriers is much larger than the thermal-generated free-charge-carrier density. Furthermore, the interface state densities (NSS) obtained taking into account the RSvalues are lower than those obtained without
considering the RS.
2. Experimental procedures
In this chapter, first, the processes of chemical cleaning and ohmic contact formation on n-Si wafer are described. Then, the pulsed laser deposition of Re contacts on the n-Si substrates are presented, and finally, the electrical measurements on the Re/n-type Si (MS) Schottky barrier diodes were taken.
2.1. Chemical cleaning
In this study, n-type silicon (Si) substrate was used as a substrate by (100) surface orientation 20 Ω-cm resistivity and 1.56 × 1015 Ω-cm−3carrier concentration. These cleaning processes were all carried out in an ‘Elma Elmasonic S40H 4.25 Liter Heated Ultrasonic Cleaner’ model and then dried in nitrogen (N2) gases. After this process, ohmic back contact to the n-type Si wafer was made by
using Au (gold) metal, followed by a temperature treatment at 420°C for 3 min in N2atmosphere
by pulsed laser depostion (PLD) technique on the back surface (unpolished) of Si wafer. The Au material was taken in‘Alfa Aesar Company’ in a 99.95% purity. As Schottky contacts, a high-purity (99.99% purity) rhenium (Re) metal film of about 200 nm thickness was deposited by PLD technique. Each dot contact area has a diameter of about 1 mm (i.e. each diode area = 0.00785 cm2)
in diameter using a metal shadow masks. The schematic diagram of the PLD system as shown in
Figure 1was used to carry out this experiment. The system used in this work hasflexibility to set
distance between target sample and substrate from 20 mm to 100 mm and this changes are done manually, substrate temperatures from 5°C to 1000°C using a PG/PBN Heather from ShinEtsu Chem. Co., Ltd. heater supplied using a AA Tech, ATP-3306D Regulated DC power supply. Furthermore, the experimental part has been explained in detail as in our previous work (Durmuş et al.,2018).
2.2. Formation of Schottky/rectifier contacts
In this experimental work, the Schottky contacts have been formed by PLD about 200 nm thick Re as dots with diameter of about 1.0 mm on the front surface of the n-Si wafer. The PLD is an interesting method because of valuable advantages such as the possibility of deposition at low temperature with low costs. Here, all contacts were deposited on n-type Silicon at room temperature under vacuum environment at pressure about 1 × 10−7mbar using a DUO 20M Rotary Vane Pump. Afterwards, the pressure was reduced to about 1 × 10−5mbar. Finally, the Re rectifying metal contact was deposited on the n-Si structure through a shadow mask. Thus, the Re/n-Si/Au structure was obtained. The area of the rectifying contact was 0.00785 cm2(=7.85 × 10−3cm2). A schematic diagram of the Re/n-Si structure (SBD) studied in the present investigation is shown inFigure 2.
2.3. Electrical measurements
The I-Vand C-V measurements of Re/n-Si Schottky barrier diodes were measured using a Keithley 4200 I-V source and a HP model 4192A LF impedance analyser (513 MHz) at room temperature,
Figure 1.(a) Schematic diagram of PLD system. (b) A photograph of PLD system produced in a local industry was used for this study.
respectively. At the same time, all measurements were carried out with the help of a microcomputer through an IEEE- 488 AC/DC converter card.
3. Results and discussion
Figure 3 shows the forward and reverse bias I-V plots of Re/n-Si Schottky barrier diodes at room
temperature. As can be seen in Figure 3, the I-V characteristics of Re/n-Si Schottky barrier diode shows a rectifier behaviour. That is, the forward current increases exponentially with the applied bias voltage, while the reverse current shows weak voltage dependence. As shown inFigure 3, the I-V curves of Re/n-Si Schottky barrier diode under the forward bias condition show the exponential increase in current at low voltage due to the decrease in the depletion layer expanse at the MS interfaces (Ahmad & Sayyad,2009). This means that forward-bias I-V curves are linear on a semi-logarithmic scale at low forward bias voltages but this structure deviates considerably from linearity at higher voltages due to the effect of series resistance. Thus, the forward bias I-V curves show only one linear region in intermediate voltages. Furthermore, the I-V curves of the Re/n-Si Schottky barrier diode are non-linear and asymmetric and show the rectification behaviour with a small leakage current of 9.88 × 10−6A at a reverse bias voltage of 1.0 V, which gives the indication of the formation of the depletion regions at the interfaces of the structure. According to the Schottky theory for a MS structure with a series resistance, the C-V relation according to the thermionic emission (TE) theory (V kT/q) can be expressed as follows (Rhoderick & Williams,1988; Sze,2006):
1.0E-06 1.0E-05 1.0E-04 1.0E-03 0.0 0.2 0.4 0.7 0.9 1.1 Current (A) Voltage (V) n=1.76; b=0.621 eV IF IR I0=1.44x10-6A;
I¼ Ioexp qðV IRsÞ nkT 1 exp qðV IRsÞ kT (1) where Iois the saturation current derived from the straight line intercept of lnI at V = 0 (saturation
current is found to be 1.44 × 10−6 A) and is given by
IO¼ AAT2exp
qΦbo
kT
(2) where q is the electron charge, V is the definite forward-bias voltage, A is the Re/n-type Si effective diode area (7.85 × 10−3 cm2), k is the Boltzmann constant (8.625 × 10−5 eV/K), T is the absolute temperature, n is the ideality factor, A* is the Richardson constant of 112 A cm−2K−2for n-type Si (Ahmad & Sayyad,2009; Alialy et al.,2013; Altındal et al.,2005; Card & Rhoderick,1971; Cheung & Cheung,1986; Chizh et al.,2013; Demirezen et al.,2013; Dhruv & Patel,2016; Durmuş et al.,2018; Hwang & Lee,2008; Janardhanam, Kil, Shim, Reddy, & Choi,2013; Janardhanam, Park, Yun, Ahn, & Choi,2012; Kabra, Aamir, Malik, & Beilstein,2014; Karataş & Altındal,2005; Karataş, Aydin, & Özerli, 2016; Kılıçoğlu,2008; Lin & Wu,1999; Mohanta, Batabyal, & Pal,2008; Mönch, 2001; Norde,1979; Nuhoğlu, Aydoğan, & Türüt,2003; Ozerli, Bekereci, Türüt, & Karatas,2017; Rao, Chandra, Hussain, Uthanna, & Naidu,2001; Rebaoui et al.,2017; Rhoderick & Williams,1988; Schmitsdorf et al.,1995; Shalish & Yoram,2000; Sze,2006; Taşdemir et al.,2016; Tung,1991,1992; Venugopalan & Mohney, 1998; Werner & Guttler,1991; Yuan,2014; Zeyada, El-Nahass, El-Menyawy, & El-Sawah,2015),Φbois
the effective barrier height and RSis the series resistance of the substrate and it dominates in the
higher bias region. The ideality factor (n) which is a measure of conformity of the structure for the thermionic emission and ideality factor n equals to 1 for an ideal diode. From Equation (1), ideality factor n can be written as follows:
n¼ q kT
dV
dðln IÞ (3)
The ideality factor can be determined from the slope of the linear region of the lnI–V plots. As shown inFigure 3, at the forward bias I-V characteristics, the Re/n-Si Schottky barrier diode exhibits two conduction mechanism operating at different bias voltage ranges. The first mechanism takes place in voltages, V≤ 0.3 V. For analysis of this mechanism, the relationship between lnI and low forward bias voltage (V≤ 0.3 V) at room temperature is shown inFigure 4. Furthermore, the barrier height (Φbo) of Re/n-type Si structure can be determined experimentally from the intercept of the
linear region (inFigure 4) of a plot of In (I) versus voltage (inFigure 3). Thus, when Iois determined
from I-V characteristics of the Re/n-type Si structure from Equation (2), barrier height (Φb) can be
expressed as follows: Φbo¼ kT q ln AAT2 Io (4) According to Equations (3) and (4), the values of ideality factor and barrier height of the Re/n-type Si structure are determined as 1.76 and 0.621 eV at room temperature, respectively. Clearly, the ideality factor of Re/n-type Si Schottky barrier diode is larger than ideal diode (n = 1). The deviation of n from unity may be due to the formation of a thin interfacial layer and the presence of edge leakage current (Dhruv & Patel,2016; Rao et al.,2001). Also, this state can be attributed to effects of the bias voltage drop across the interfacial native oxide layer and series resistance. Because, the formation of such a thin interfacial layer is inevitable during the fabrication of the structure by the conventional techniques and before deposition of Re on the front surface of the Si substrate (Dhruv & Patel,2016; Karataş & Altındal,2005; Mohanta et al.,2008; Mönch,2001; Nuhoğlu et al.,2003; Rao et al.,2001; Yuan,2014). Another important parameter for better performance of SBD is recti fica-tion ratio (RR). The RR is determined as the ratio of the forward current (IF) to the reverse current (IR)
at a certain applied voltage (IF/IR). It is well known that the RR is subjective to the applied voltage.
FromFigure 3, the RR value is found to be 101.21 at ±1.0 V measured at room temperature (300 K).
Such high RR was ascribed to high electron mobility of Re and n-type Si structure, and high rectification ratio implies that the samples have a higher forward current and smaller reverse current (Chizh et al.,2013; Hwang & Lee,2008). Such a high rectification presented by the Schottky barrier diode will generally be useful in all electronic circuitry (Kabra et al.,2014). This value is very close than that of the p-NiPc/n-Si heterojunction reported by Kabra and Zeyada (Kabra et al.,2014; Zeyada et al.,2015). Zeyada et al., (2015), for p-Si heterojunction device, rectifying behaviour with RR of 102 at ±1 V have been determined at room temperature.
Figure 3shows forward current of Schottky structure that tends to saturate at forward voltage
above 0.3 V for Re/n-type Si structure. This relatively low forward current attributed to higher series resistance. The high values of series resistances reduce mobility of electrons or holes (Rebaoui et al., 2017). Thus, the high values of series resistance lead to a downward I–V plots at high voltages. When the value of series resistance (RS) is sufficiently high, the linear range of the forward bias
I-V plots may be reduced. Thus, the series resistance, ideality factor (n) and barrier heights (Φbo)
values were also achieved using a method developed by Cheung’s and Norde (1986,1979) in the downward curvature of the I-V measurements. The series resistance can be obtained by different methods. We have obtained series resistance values using methods developed by Cheung’s (1986) and Norde’s (1979). Thus, Cheung method (Cheung & Cheung,1986) was applied to evaluate series resistance (RS) and ideality factor (n) using a modified Equation (1):
dV
dðlnIÞ¼ RsIþ n kT
q (5)
which should a straight line for the data of downward curvature region of the forward bias I-V characteristics, -14 -13 -12 -12 -11 -10 -9 -8 -8 -7 -6 0.00 0.02 0.04 0.06 0.08 0.10 0.12 Ln(I) A Voltage (Volt)
Figure 4.The variation of ln (I) with voltage for Re/n-type Si Schottky barrier diode at lower voltages (V ≤ 0.3 V), inset figure shows the variation of current (I) with square of voltage (V2) forV > 0.3 V.
HðIÞ ¼ V n kT q ln I AAT2 (6) with HðIÞ ¼ RSIþ nΦb (7)
Figure 5 shows experimental dV/d(lnI) versus I and H(I) versus I plots for Re/n-type Si Schottky
barrier diodes. Therefore, Equations (5) and (7) give a straight line for I-V measurement in forward bias. Using Equation (5), ideality factor and series resistance values are derived from intercept and slope of dV/d(lnI) versus I curves. In the same way, using Equation (7), series resistance and barrier height (Φb) values are derived from intercept and slope of H(I) versus I curves. As can be seen in
Figure 5, from dV/dln(I) versus I plot by means of Equation (5), the values of 1097.80Ω and 3.20 for
RSand n of the device were obtained, respectively. The values of 854.62Ω and 0.170 eV for RSand
Φbwere also obtained from H(I)-I plot according to Equation (7), respectively. As can be seen, the
ideality factors (n) values obtained from dV/d(ln I)–I curves are higher than obtained from lnI–V curves. This state can be attributed to the effect of the RSand nature of forward voltage (Cheung &
Cheung, 1986). Furthermore, the ideality factor’s value obtained from the slope of lnI–V plot represent to intermediate bias voltages, but ideality factor’s value obtained from dV/d(lnI)–I plots corresponds to high bias voltages (Ozerli et al.,2017).
Also, Norde suggested a different method to determine the values of the barrier height and series resistance obtained from I-V measurements (Norde,1979). This means that Norde’s method can be also used to compare the barrier heights and series resistances obtained from Cheung’s method. The method requires a modified Norde function, F(V), being plotted against voltage. The F (V) is given by F Vð Þ ¼V γ kT q ln I Vð Þ AAT2 (8) -0.1 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5
0.E+00 1.E-04 2.E-04 4.E-04 5.E-04 6.E-04 7.E-04 8.E-04 1.E-03 1.E-03
H(I);
dV/dln(I)
Current (A)
whereγ is an arbitrary integer greater than n (γ > n) and I(V) is the current obtained from the I-V measurements. The barrier height (Φbo) and series resistance (RS) of the Re/n-type Si structure
can be obtained using the following equation; Φb¼ F Vð Þ þ0 V0 γ kT q (9) RS¼γ n I kT q (10)
where F(V0), V0 and I0 are the minimum value of F(V), the corresponding voltage and current,
respectively.Figure 6shows the plot of F(V) versus V for the Re/n-type Si Schottky barrier diodes. Thus, using in Equations (9) and (10) from Norde method, the barrier height and series resistance values obtained were 0.689 eV and 1647.21 Ω from the F(V)–V plot, respectively. As can be seen in text, the series resistance and barrier height values obtained from Cheung’s method (Cheung & Cheung,1986) are lower than that obtained from Norde method (Norde,1979). This is because that, while Cheung functions are only applied to the non-linear region in high voltage region of the forward bias lnI–V characteristics, Norde’s functions are applied to the full forward bias region of the lnI–V characteristics of the junctions (Card & Rhoderick,1971; Cheung & Cheung, 1986; Karataş et al., 2016; Kılıçoğlu, 2008; Norde,1979; Ozerli et al., 2017; Rhoderick & Williams,1988; Sze,2006). In the same way, the barrier height value obtained from the Norde’s method and ideality factor value obtained from Cheung’s method are larger than those obtained from the forward I-V method. In this case, Norde’s metod may not be a suitable method for the rectifying junctions with high ideality factor, which are not suitable with the thermionic emission model. Therefore, there is a discrepancy between barrier heights calculated from Norde’s, Cheung’s and forward I-V methods (Janardhanam et al.,2013).
The C-V measurements were made on the Re/n-type Si Schottky barrier diodes to confirm some important parameters obtained from I-V measurements. Because the C-V method is also one of the fundamental properties of semiconductor structures. Figure 7(a,b) shows the room temperature (T = 300 K) variation of C-V and C−2–V curves for Re/n-Si Schottky barrier diode at 500 kHz, respectively.
0.55 0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95 1.00 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 F (V ) (Voltage) Voltage (V) b= 0.689 eV RS= 1647.21 V0= 0.11 eV F0 = 0.605 eV
Figure 6.F(V) versus V plot obtained from forwardbias current-voltage characteristics of the Re/n-type Si Schottky barrier diode.
The curve of C−2with the V is linear that shows the formation of Schottky structure (Dhruv & Patel, 2016). The variation of C−2with V in this structure can be described by Demirezen et al. (2013),
1 C2¼
2 Vð þ V0Þ
qεSε0NDA2
(11) where C is the capacitance, A is area of Schottky diode (7.85 × 10−3 cm2), V0 is the diffusion
potential at zero bias and is determined from the extrapolation of the linear C−2-V plot to the V axis, ɛs is the dielectric constant of the semiconductor (=11.8 for Si) (Rhoderick & Williams,1988; Sze,
2006),ɛ0is the dielectric constant of vacuum (8.85 × 10−14F/m) and NDis the donor concentration
of n-type semiconductor substrate. The C−2-V plot is a straight line whose intercept with the V axis gives the value of V0. The value of the barrier heightΦb(CV) can be calculated by the following
well-known equation, using C–V characteristics: Φbð Þ ¼ VCV iþ kT q þ kT ln NC ND ΔΦb¼ VDþ EF ΔΦb (12)
where EFis the Fermi energy, NCis the density of states in the conduction band edge for Si, NDis
doping concentration of the substrate, Viis the intercept point of V axis from C−2-V curve andΔΦb
is the image force alone causes barrier lowering. Thus, the Schottky barrier height Φb(CV) of
0.720 eV could be calculated by substituting the values of VD (=0.565V), EF (=0.182 eV) andΔΦb
(=0.0273 eV) in Equation (12). The barrier height value calculated from C-V curve (=0.720 eV) is slightly higher than the value derived from I-V curve (=0.621 eV). It is clear that there is a dis-crepancy of Schottky barrier height (SBH) obtained from reverse bias C–V curve and forward bias I– V curve is 0.099 eV. This situation originates from the different natures of the C-V and I-V measurement methods. Also, this difference is explained due to an interface layer or to trap states in the substrate, the effect of the image force and the barrier inhomogeneity’s (Chattopadhyay,1995; Janardhanam et al.,2013,2012; Tung, 1991,1992).
-5.E+18 9.E+18 2.E+19 4.E+19 5.E+19 7.E+19 8.E+19 0.0E+00 4.0E-10 8.0E-10 1.2E-09 1.6E-09 2.0E-09 2.4E-09 -9.0 -7.0 -5.0 -3.0 -1.0 1.0 3.0 5.0 7.0 9.0 C -2 (pF) -2 Capacitance (pF) Voltage (V) (a) (b) C-2-V curve
Also, Chattopadhyay (Kılıçoğlu & Asubay, 1999) suggested another method to calculate the values of the barrier height. According to Chattopadhyay (1995),
ψS¼ kT q ln AAT2 I Vn (13)
where ψs is critical surface potential, Vnis the potential difference between the Fermi level and
bottom of the conduction band in the neutral region of n-Si which calculated as 0.182 eV. Using Equation (13), surface potential (ψs) was determined. Figure 8shows the calculated ψs
values against forward voltage. So, the barrier height can be written as follows (Akkılıç, Ocak, Kılıçoğlu, İlhan, & Temel,2010; Chattopadhyay,1995; Karataş, Yıldırım, & Türüt,2013; Kılıçoğlu & Asubay,1999):
Φb¼ ψSðIc; VcÞ þ C2Vcþ Vn (14)
FromψS–V plot, there is a linear decrease in the value of ψSuntil V reaches the critical value VC(the
critical voltage). As can be seen in Figure 8, the VC and ψS(IC, VC) values of the structure were
determined as 0.069 and 0.403 V, respectively. At the same time, the value of C2 can be
expressed as,
C2¼ 1=n ¼ dψð S=dVÞIc;Vc (15) Thus, using Equations (14) and (15), the values of barrier height and the ideality factor were obtained as 0.621 eV and 1.760. As can be seen, these values equal to values obtained from the I–V plot.
Furthermore, the energy distribution or density distribution curves of the interface states (NSS)
can be determined from the forward bias the I–V data by taking into account the bias dependence of the effective barrier height (Φb) with and without series resistance (RS). In n-type
semiconduc-tors, the energy of the interface states, EC-ESS, with respect to the top of the conduction band at the
0.27 0.30 0.33 0.36 0.39 0.42 0.45 0.48 0.00 0.10 0.20 0.30 0.40 0.50 0.60 0.70 0.80 0.90 1.00 1.10 Surface Potential, S , ( V ) Voltage (V) S(VC)= 0. 403 V VC = 0.069 V
surface of the semiconductor is given by (Hudai & Kruppanidhi, 2000; Nicollian & Brews, 1982; Rhoderick & Williams,1988; Sze,2006),
EC ESS¼ qΦe qV (16)
where V is the applied voltage drop across the depletion layer and Φe is the effective barrier
height which this is equal toΦe¼ ΦbðIVÞþ 1 1=nð IVÞV. However, for MS structure having interface
states in equilibrium with the semiconductor, the ideality factor (n) which becomes greater than unity as proposed by Card and Rhoderick (1971) and the interface-state density, NSS, can be
expressed as follows: NSSð Þ ¼V 1 q εi δðn Vð Þ 1Þ εs WD (17)
where WDis the space charge region width (WD¼ 3437oA); NSSis the density of interface states;
n Vð Þ ¼ V= kT=qð Þ ln I=I0is the voltage-dependent ideality factor;εs,εiandδ are the permittivity of
the semiconductor, interfacial layer and the thickness of insulator layer, respectively. The interfacial insulator layer thickness δ ¼ 136:86oA was obtained from high frequency (500 kHz)
C-V measurements. Thus, as shown in Figure 9, the energy changes (EC-ESS) of the interface state
density (NSS) distributions calculated using Equations (16) and (17). As can be seen inFigure 9, the
Nss have an exponential rise with bias from some above the midgap towards the top of the
conduction band for both states of the Re/n-type Si Schottky barrier diodes. As can be seen, the values of NSS obtained taking into account the series resistance values are lower than those
obtained without considering the series resistance. The NSSobtained without taking into account
RShas increased exponentially with bias from 1.52 × 1013cm−2eV−1in (EC–0.603) eV to 7.37 × 1014
cm−2eV−1 in (EC-0.470) eV, and the NSS obtained taking into account the series resistance has
0.E+00 1.E+14 2.E+14 3.E+14 4.E+14 5.E+14 6.E+14 7.E+14 8.E+14 0.46 0.48 0.50 0.52 0.54 0.56 0.58 0.60 0.62 0.64 NSS (eV -1cm -2) EC-ESS(eV)
Figure 9.The interface state energy distribution curves of the Re/n-type Schottky barrier diode with and without taking into account the series resistance.
increased exponentially with bias from 9.57 × 1012cm−2eV−1to 3.91 × 1014cm−2eV−1in the same interval. The above explanations clearly state that the series resistance value should be taken into account in determining the interface state density distributions as other main diode parameters (ideality factor, barrier height, saturation current,rectification ratio and so on).
4. Conclusion
In this work, the main electrical parameters of Re/n-type Si Schottky barrier diode were investigated by using I-V and C-V characteristics at 300 K (room temperature). The main parameters of interest are ideality factor (n), barrier height (Φb), series resistance (RS), rectification ratio (RR), carriers
concentrations (ND), surface potential (ψs) and interface states density (NSS). The electrical
conduc-tion in the Re/n-type Si Schottky barrier diode was found to take place by TE at low voltages (V≤ 0.3 V) and by SCLC at higher voltages (V > 0.3 V). The difference in the barrier heights obtained from I–V and C–V measurements can be explained due to an interface layer or to nature of potential fluctuations at the interface. Also, this situation can be attributed to the effect of the image force and the barrier inhomogeneity. At the same time, the barrier heights obtained from I-V, C-V, Cheung and Norde’s methods are comparable with those determined by surface potential-forward voltage plot (ψs-V). Also, the series resistances (RS) calculated using dV/d(lnI)-V, H(I)-V and
F(V)-V curves were compared with each other. In addition, the energy distribution profiles of the NSS obtained from the I–V characteristics
by taking into account the bias dependence of the effective barrier height (Φe) with and without RS
were investigated at room temperature. The obtained results show that the interface state densities at an interfacial insulator layer play an important role in the value of the barrier heights (Φbo), saturation currents (Io), ideality factors (n), series resistances (RS), rectification ration (RR) and
carrier concentration (ND) of Re/n-type Si Schottky barrier diode. I believe that this work will be
helpful to develop a simple Schottky diode in the near future.
Acknowledgments
The authors would like to thank A. Yildiz for reading this manuscript (Abdulkadir Yildiz is Professor in Department of Physics at Faculty of Sciences and Arts, Kahramanmaraş Sütçü Imam University).
Disclosure statement
No potential conflict of interest was reported by the authors.
ORCID
Şükrü Karataş http://orcid.org/0000-0003-1668-7866
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