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New ECCII-Based Electronically Controllable
Current-Mode Instrumentation Amplifier with High
Frequency Performance
Shahram Minaei
Leila Safari
Independent Researcher,
Tehran, Iran
leilasafari@yahoo.com
Department of Electronics and Communications
Engineering, Dogus University, Acibadem, Istanbul,
Turkey
sminaei@dogus.edu.tr
Abstract: In this paper, a new electronically controllable current-mode instrumentation amplifier (CMIA) is presented. The proposed CMIA is based on only two electronically tunable second-generation current conveyors (ECCIIs). It does not need any passive element which makes it highly suitable for integration. More interestingly, high CMRR is achieved without the need for matching between active elements. Its input and output signals are current and it enjoys low input and high output impedances, respectively. Due to the inefficiency of the existing ECCIIs, a new ECCII circuit is also designed to be used in the proposed CMIA structure. PSPICE simulation results using 0.18μm TSMC CMOS technology and supply voltage of ±0.9V, shows CMRR of 42dB and fixed -3dB bandwidth of 68MHz for differential-mode gain ranging from 0dB to 27dB.
Keywords: Current-Mode; Instrumentation Amplifier; CMRR; ECCII.
1-INTRODUCTION
Instrumentation amplifiers (IAs) are very important active blocks in signal processing applications. The traditional method to implement IAs is based on using three operational amplifiers (op-amps) and seven resistors [1-5]. However, to obtain high CMRR, perfectly matched resistors are required. In recent years, current-mode instrumentation amplifiers (CMIA) are proposed in which current-mode building blocks are used instead of op-amps [1-5]. One obvious advantage of most CMIAs is that their CMRR only depends on the matching of active elements not the resistors which is easier to achieve. In addition, they exhibit better frequency performance compared to conventional IAs.
Electronic controlling characteristic of a CMIA is a key feature that makes it possible to change the differential-mode gain without the need for external variable resistors. This
makes them highly appropriate for integrated circuit (IC) design due to occupying less chip area. However, the previously reported CMIA implementations with electronic controlling capability have several disadvantageous [1-5]. For example, in [1] a CMIA based on five operational transconductance amplifiers (OTAs) is presented in which electronic tunning is achieved by changing the bias current of OTAs. The disadvantage of the method proposed in [1] is its complicated structure which results in high power consumption and chip area. The electronically controllable CMIA of [2], uses two current controlled current conveyors transconductance amplifiers (CCCCTAs). By bias current variation, the input impedance at CCCCTAs X-terminal changes and results in differential-mode gain variation. Unfavorably, it is implemented in BiCMOS technology and requires high supply voltage and power consumption. In the CMIA presented in [3] three current controlled second-generation current conveyors (CCCIIs) are used. The impedance at X-terminal of CCCIIs is changed electronically which results in differential-mode gain variation. Its main weakness is high supply voltage requirement. The electronically controllable CMIA of [4] employs current mirrors and an electronically controlled resistor to achieve variable gain. The disadvantage of [4] is that its output signal is voltage and therefore additional voltage buffer is required at the output. Current mirrors are employed in [5] to design an electronically controlled CMIA. It uses degenerated current mirror to control differential-mode gain. Its main disadvantage is its low frequency performance of CMRR.
In this paper, a new structure for implementing electronically controllable CMIA is presented. The proposed CMIA is based on only two ECCIIs. The significant feature of the proposed CMIA over all previously reported CMIAs is that matching between two active elements is not required. Therefore, the proposed structure is highly robust against process mismatches. As the existing ECCII circuits are not efficient in
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terms of power consumption and circuit complexity, a very simple ECCII with low power consumption is also proposed and used in the implementation of proposed CMIA.The rest of the paper is organized as follows: In Section 2, the proposed ECCII and its simulation results are given. The proposed CMIA and its simulation results are presented in Section 3 and finally Section 4 concludes the paper.
2-THE ECCII DESIGN A- The Proposed ECCII Circuit
The symbolic representation of ECCII is shown in Fig. 1 [6] and its function is characterized by Eq. (1):
= , = × , = 0 (1) As it is seen from Eq. (1), unlike conventional CCIIs, the current at Z terminal is designed to be K times of X terminal current. The interesting characteristic of ECCII is that current gain K can be electronically varied. There are different realizations of ECCII in open literature [6-10]. However, the existing ECCIIs suffer from serious drawbacks such as complicated structure and the need for a compensation floating capacitor [6], low impedance at Z terminal [7], the need for Bipolar technology for implementation [8-9] and complicated internal structure [6,10]. Here, a high performance ECCII is presented which unlike previously reported works, has a very simple and compact structure which makes it highly suitable for low-voltage low-power applications.
The proposed ECCII is shown in Fig. 2. Transistors M1 and
M2 which are gate connected and have equal bias currents are
used to transfer Y terminal voltage to X terminal. The degenerated current mirror made of M3-M6 transistors
performs a very important task of reducing X-terminal impedance by establishing negative feedback loop. It is also used to provide variable current gain between X and Z terminals for different values of control voltage VC.
A straight forward analysis gives the input and output impedances of the proposed ECCII as:
≈ 2−1
×( 2‖ 3) (2)
where, roMB3, ro2, and gm2 are the output impedance of
transistors MB3, M2, and transconductance of transistor M2,
respectively. The gmeq is also defined as:
= 3
1+( 3× 6) (3)
Current gain can also be found as [5]:
= 4
3×
1+ 3× 6
1+ 4× 5 (4)
Fig. 1. Symbolic representation of ECCII [6]
M1 VDD X M2 Z M3 M4 Vss M6 M5 Y MB3 MB2 MB1 MB4 IB1=15uA MB5 MB0 VC MB7 MB8 MB9 MB6 MLS M’3 M’6 VC IB2=5uA IB1 M’4 M’5 W=108u L=0.54u W=108uL=0.54u
W=108u L=0.54u W=108u L=0.54u W=54u L=0.54u W=54u L=0.54u W=3.6u L=0.36u W=10.8u L=0.54u W=10.8uL=0.54u
W=50.4u L=0.54u W=9u L=0.9u W=5.04u L=0.54u W=0.9u L=0.9u W=50.4u L=0.54u W=9u L=0.9u W=5.04u L=0.54u W=0.9u L=0.9u W=108u L=0.54u W=108u L=0.54u W=108.54u L=0.54u W=108.54u L=0.54u
Fig. 2. The proposed ECCII circuit implementation
where gmi (i=3,4) is transconductance of the related transistor.
In addition, rDs5 and rDs6 are found as:
5= 1
. 0 55( − − ) (5)
6= 1
. 0 66(− − ) (6)
where μ, VTH, W and L are carrier mobility, threshold voltage,
the channel wide and channel length of transistors, respectively.
B- Simulation Results of the Proposed ECCII
The operation of the proposed ECCII is verified through PSPICE simulations using 0.18μm TSMC CMOS parameters under supply voltage of ±0.9V. The used transistors aspect
Fig. 3. Frequency response of ECCII current gain for different values of VC
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Fig. 4. Transient analysis of the proposed ECCII for different values ofVC
ratios and the values of bias current sources are shown in Fig. 2. To have a wider gain range, gain of the degenerated current mirror is set at 10 which enables us to achieve current gain 20dB for VC=0V. Gain larger than 20dB is also achieved by
applying positive control voltages. Fig. 3 shows current gain frequency response of the proposed ECCII for different values of control voltage VC. As it is seen, the current gain varies
from 0dB to 28dB and -3dB bandwidth varies from 127MHz to 101MHz. Time-domain response of the proposed ECCII for sinusoidal input current with peak-to-peak value of 2μA and frequency of 5kHz is also shown in Fig. 4. The THD value is 5.9%. The values of input impedance, output impedance and power dissipation (for VC= 0.234V) are found as 624Ω,
1.5MΩ and 628μW respectively. For VC=0.9V, the value of
output impedance reduces to 40kΩ which is still high enough for most of the applications.
3- THE PROPOSED CMIA STRUCTURE A- The proposed CMIA
The proposed CMIA is shown in Fig. 5. It consists of two ECCIIs. In the first ECCII control voltage VC1 is used to
provide variable gain for the proposed CMIA. While, the second ECCII has a fixed current gain of unity which is achieved by connecting VC2 to -0.234V. The output of second
ECCII is connected to the input of first ECCII. This connection results in subtraction of common-mode currents and addition of differential-mode ones right at the first ECCII's input. Performing a KCL analysis in Fig. 5, gives the output current as:
Io= K1× (I1− K2× I2) (7)
where K1 and K2 are the current gains of the first and second
ECCII respectively. For common-mode inputs we have I1=I2=Icm. Therefore, common-mode gain of the proposed
CMIA is found as:
Acm =IIo
cm = K1× (1 − K2) (8)
The current gain of second ECCII is selected close to unity and can be expressed as
K2= 1 − εi (9)
in which εi<<1. By inserting Eq. (9) into Eq. (8),
common-mode gain is found as: Acm =IIo
cmo= K1× εi (10)
For differential-mode inputs we have I1=-I2=Idm/2 and using
Eq. (7), differential-mode gain of the proposed CMIA is found as: Adm =IIo dm = K1× ( 1 2+ K2 2) (11)
Inserting Eq. (9) into Eq. (11) gives
Adm = K1× (1 −ε2i) ≈ K1 (12)
Using Eq. (12) and Eq. (10), CMRR of the proposed CMIA is achieved as:
CMRR = Ad
Acm ≅
1
εi (13)
As it is seen from Eq. (13), to achieve high CMRR matching between two active building blocks is not required. Instead, current gain of second ECCII should be close to unity. The interesting property of the proposed CMIA is that if current gain of second ECCII deviates from unity because of mismatches between transistors, its control voltage can be used to compensate it.
B-Simulation Results of the Proposed CMIA
In the proposed CMIA VC2 is set to -0.234V which gives K2=1
and VC1 is varied from -0.234V to Vdd. The CMRR frequency
performance of the proposed CMIA is shown in Fig. 6 which shows a DC gain value of 42dB. Differential-mode gain of the proposed CMIA is shown in Fig. 7. As it is seen from Fig. 7, differential-mode gain varies from 0dB to 27dB and its -3dB bandwidth remains approximately constant at 68MHz. Input impedance is 624Ω and Output impedance varies from 1.5MΩ (VC1=-0.234V) to 60 kΩ (VC1=Vdd) respectively. It also
consumes 950μW at VC1=-0.234 V and 1.73 mW at VC1=Vdd.
A comparison between proposed CMIA with other electronically tunable ones is given in Table-1. As it is seen, compared to CMIAs of [1] and [5], the proposed CMIA
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Y1 X1 Z1 K1=K VC1 i1 io=K1×(i1-K2×i2) Y2 X2 Z2 K2=1 VC2 ECCII2 i2Fig. 5. Structure of the proposed CMIA
Fig. 6. CMRR frequency response of the proposed CMIA
Fig. 7. Frequency response of differential-mode gain of the proposed CMIA
exhibits higher frequency performance for differential-mode gain. It also requires smaller supply voltage compared to [2-3]. Although the CMIA of [4] exhibits higher frequency performance compared to the proposed one, but for practical use it requires additional voltage buffer at the output which will degrade its frequency performance.
4- CONCLUTION
In this paper, a new low power CMIA topology based on two ECCIIs is presented. The differential-mode gain can be controlled by a control voltage. The proposed CMIA does not require matching between active elements to achieve high CMRR. It also exhibits superior performance in many aspects compared to other similar works. First, it has a very simple and compact structure. Second, it exhibits higher frequency performance. Third, input and output ports exhibit low and high impedances respectively which are highly demanded properties in current-mode signal processing. A compact ECCII is also proposed to implement proposed CMIA. The proposed ECCII exhibit superior performance compared to other existing ECCIIs and can be used in other applications such as oscillators and filters too.
REFRENCES
[1] A. Julsereewong, N. Tananchai, V. Riewruja, “Electronically Tunable Gain Instrumentation Amplifier Using OTAs" IEEE International Conference on Control, Automation and Systems (ICCAS 2008), pp. 1820–1823, 2008. [2] C. Chanapromma, C. Tanaphatsiri, M. Siripruchyanun,” An Electronically Controllable Instrumentation Amplifier Based on CCCCTAs" IEEE International Symposium on Intelligent Signal Processing and Communications Systems (ISPACS2008), pp. 1–4, 2009.
[3] S. Maheshwari "High CMRR wide bandwidth instrumentation amplifier using current controlled conveyors" Int. J. Electronics, Vol. 89, No. 12, pp.889-896, 2003.
[4] L. Safari, E.Yuce, S.Minaei "A new transresistance-mode instrumentation amplifier with low number of MOS transistors and electronic tuning opportunity" Journal of Circuits, Systems, and Computers, Vol. 25, No. 4, 1650022 (14 pages), 2016.
[5] L. Safari, S. Minaei "A Novel Resistor-Free Electronically Adjustable Current-Mode Instrumentation Amplifier" Circuits Systems and Signal Processing, Vol. 32, pp.1025–1038, 2013.
[6] S. Minaei, O. K. Sayin, and H. Kuntman "A New CMOS Electronically Tunable Current Conveyor and Its Application to Current-Mode Filters" IEEE Transactions on Circuits and Systems-I:Regular Papers, Vol.53, No. 7, pp.1448-1457, 2006.
[7] W. Surakampontorn, K. Kumwachara, “CMOS-based electronically tunable current conveyor,” Electron. Lett. ,Vol. 28, No. 14, pp.1316–1317, Jul. 1992.
[8] W. Surakampontorn, P. Thitimajshima" Integrable electronically tunable current conveyors " IEE Proceedings, Vol. 135, Pt. G, No. 2, pp.71-77, April 1988.
[9] A. Fabre and N. Mimeche, “Class-A/AB Second-Generation Current Conveyor with Controlled Current Gain,” Electron. Lett., Vol. 30, No. 16, pp. 1267–1269, Aug. 1994.
[10] A. A. El-Adawy, A. M. Soliman, and H. O. Elwan, “Low Voltage Digitally Controlled CMOS Current Conveyor,” Int. J. Electron. Commun. (AEÜ), Vol. 56, No. 3, pp. 137–1, 44, 2002. Table-1. Comparison between the proposed IA and other electronically controllable CMIAs (*Output Signal both Voltage and Current)
Ref Active elements Input-Output signals # of Resistors Ad -3dB BW CMRR-3dB BW CMRR Vdd-Vss Pd (mW) [1] 5 OTA V-V 1 <1 MHz <1 MHz ≈95 dB NA NA [2] 2 CCCTA V-V,I* 0 83.75 MHz <100 kHz 94 dB ±1.5 V 4.43 [3] 3 CCCII V-V,I* 0 10 MHz 35 kHz 147 dB ±2.5 V NA
[4] Current and Voltage
buffers I-V 0
14.34- 277.4
MHz 4.2 MHz 40 dB ±0.9 V 0.494
[5] 4 Current Mirror I-I 0 10.18 MHz ≈10 kHz 91 dB ±0.8 V 0.219-0.446
